| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory employing a defective column replacement system which enables chip area reduction. <P>SOLUTION: The semiconductor memory is provided with: a memory cell array in which electrically rewritable nonvolatile memory cells are arrayed; a sense amplifier circuit for reading the data of the memory cell array; a first data holding circuit for holding data indicating good or bad of each column of the memory cell array; and a second data holding circuit for holding data read from the first data holding circuit to control the skipping of a defective column address based on the output thereof. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
