发明名称 Chip structure with redistribution Circuit, chip package and manufacturing process thereof
摘要 A semiconductor chip or wafer comprises a passivation layer and a circuit line. The passivation layer comprises an inorganic layer. The circuit line is over and in touch with the inorganic layer of the passivation layer, wherein the circuit line comprises a first contact point connected to only one second contact point exposed by an opening in the passivation layer, and the positions of the first contact point and the only one second contact point from a top view are different, and the first contact point is used to be wirebonded thereto.
申请公布号 US2006022311(A1) 申请公布日期 2006.02.02
申请号 US20050181244 申请日期 2005.07.14
申请人 LIN MOU-SHIUNG 发明人 LIN MOU-SHIUNG
分类号 H01L23/58;H01L23/12 主分类号 H01L23/58
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