| 摘要 |
A non-volatile semiconductor memory device includes a bit line, a plurality of rows of NAND strings provided so as to correspond to the bit line, a plurality of series connected selective gate transistors arranged between the rows of NAND strings in a direction of column, the selective gate transistors including one selective gate transistor having a gate length differing from gate lengths of the other selective gate transistors, the selective gate transistors arranged in the direction of column including one selective gate transistor having a gate length differing from gate lengths of the other selective gate transistors.
|
