发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To suppress failure in patterning in a resist layer as much as possible in a method for manufacturing a chip size package type semiconductor device. <P>SOLUTION: After an aperture 10w is formed on the back face of a semiconductor substrate 10, a second insulating film 16 and a second resist layer 17 are formed thereon. The surface of the resist layer 17 is subjected to hydrophilic treatment by ashing. Then the substrate is exposed through a mask having an aperture in a region from a part on a pad electrode 12 in the bottom to a dicing line DL. Then the substrate 10 having the second resist layer 17 is immersed in a developing solution 20d to develop the second resist layer 17. As the developing solution 20d reaches the bottom and near the bottom of the aperture 10w, the second resist layer 17 in the region from a part on the pad electrode 12 to the dicing line DL is reliably removed to reliably expose a part of the second insulating film 16. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006030230(A) 申请公布日期 2006.02.02
申请号 JP20040204186 申请日期 2004.07.12
申请人 SANYO ELECTRIC CO LTD 发明人 YAMADA KOJI;YAMAGUCHI KEIICHI;NOMA TAKASHI;SEKI YOSHINORI
分类号 G03F7/38;G03F7/40;H01L21/301;H01L23/12 主分类号 G03F7/38
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