发明名称 GAME MACHINE, AND MEMORY BOARD FOR GAME MACHINE
摘要 PROBLEM TO BE SOLVED: To provide a game machine which can reduce costs by providing a decoder not on a memory board but on a CPU board while warranting identity with an officially approved board, and to provide a memory board for game machine. SOLUTION: To a subsidiary board 20 equipped with the CPU 40 connected with an address bus 22, the memory board 30 is freely detachably attached through connectors (60 and 80). On the memory board 30, ROM chips 70-1 to 70-4 which the CPU 40 uses are provided, and on the subsidiary board 20, an address decoder 50 which generates a selection signal for the ROM chips 70-1 to 70-4 when receiving an address signal of a part of the address bus 22 is further provided. The ROM chips 70-1 to 70-4 are connected with a part (33) of an address bus 32, and other part (34) of the address bus 32 is returned to the subsidiary board 20 through the connectors (60 and 80), and is input in the address decoder 50. The output of the address decoder 50 enters the memory board 30 through the connectors (60 and 80), and is respectively connected with the selection terminals (CS) of the ROM chips 70-1 to 70-4. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006026181(A) 申请公布日期 2006.02.02
申请号 JP20040210689 申请日期 2004.07.16
申请人 OLYMPIA:KK 发明人 MIYAZAKI KOKICHI
分类号 A63F5/04 主分类号 A63F5/04
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