发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent incorrect write to a register under an influence of noise etc. by adding simple hardware to a register circuit which operates with an edge trigger. SOLUTION: When new data is written to a register circuit 1, noise protection is performed by reading data including redundant bits stored in the register circuit 1, performing parity check based on the redundant bits concerned and permitting write of new data only when the check result is normal. At this time, a parity circuit 5 adds redundant bits which do not become all zero or all ones even if a default value or an arbitrary value is written in the register circuit 1. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006031434(A) 申请公布日期 2006.02.02
申请号 JP20040209916 申请日期 2004.07.16
申请人 YAMAHA CORP 发明人 ITO MASAHIRO
分类号 G06F12/16;H03M13/09 主分类号 G06F12/16
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