发明名称 Method of manufacturing a semiconductor device
摘要 The invention is directed to improvement of reliability of a process of separating a layer to be patterned such as a wiring layer in a semiconductor device manufacturing method. A wiring layer (18) is formed on a back surface of a semiconductor substrate (10) including an opening. A third resist layer (19) (positive resist layer) is formed on the wiring layer (18), having an opening (10a) in a pre-determined region along a dicing line (DL) at a bottom of the opening, and the wiring layer (18) is etched using the third resist layer (19) as a mask. After the third resist layer (19) is removed, a fourth resist layer (negative resist layer) is formed on the wiring layer (18) so as to leave the wiring layer in a region of a predetermined pattern, and the wiring layer (18) is etched using the fourth resist layer as a mask. The wiring layer (18) is thus patterned so as to form the predetermined pattern and be separated at the predetermined region along the dicing line (DL) at the bottom of the opening without fail.
申请公布号 EP1622197(A2) 申请公布日期 2006.02.01
申请号 EP20050016611 申请日期 2005.07.29
申请人 SANYO ELECTRIC CO., LTD. 发明人 YAMADA, HIROSHI;YAMAGUCHI, KEIICHI
分类号 H01L21/78;H01L23/31;H01L23/485 主分类号 H01L21/78
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