发明名称 |
Method for synchronizing clock and data signals |
摘要 |
A method for synchronizing a data signal and a clock signal has been developed. The method first generates two separate intermediate data signals. The intermediate data signals lag the input data signal. The separate durations of the two lagging signals are combined to form an output data signal that is synchronized with the system clock signal.
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申请公布号 |
US6993103(B2) |
申请公布日期 |
2006.01.31 |
申请号 |
US20010040169 |
申请日期 |
2001.10.22 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
GREENHILL DAVID J.;THORP TYLER J.;TRAN JAMES;YEE GIN S. |
分类号 |
H04L7/00;H04L7/02 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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