| 发明名称 |
Read bitline inhibit method and apparatus for voltage mode sensing |
| 摘要 |
A multilevel memory system uses a source line driver circuit and a read bitline inhibit driver circuit to eliminate inhibit offset currents on unselected bitlines before memory operations of selected memory cells to equalize voltages before the operation.
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| 申请公布号 |
US6992934(B1) |
申请公布日期 |
2006.01.31 |
| 申请号 |
US20050080595 |
申请日期 |
2005.03.15 |
| 申请人 |
SILICON STORAGE TECHNOLOGY, INC. |
发明人 |
SARIN VISHAL;TRAN HIEU VAN;FRAYER JACK |
| 分类号 |
G11C16/08 |
主分类号 |
G11C16/08 |
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