发明名称 |
Deep well implant structure providing latch-up resistant CMOS semiconductor product |
摘要 |
A CMOS semiconductor product employs a first doped well of a first polarity and a second doped well of a second polarity opposite the first polarity, each formed laterally separated within a semiconductor substrate. The first doped well is further embedded within a third doped well of the second polarity that further separates the first doped well from the second doped well. The third doped well provides latch-up resistance for a pair of MOS transistors formed within the first doped well and the second doped well.
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申请公布号 |
US6992361(B2) |
申请公布日期 |
2006.01.31 |
申请号 |
US20040761658 |
申请日期 |
2004.01.20 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
SHIN JIAW-REN;LEE JIAN-HSING;CHEN SHUI-HUNG |
分类号 |
H01L29/00;H01L21/8238;H01L27/092 |
主分类号 |
H01L29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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