| 摘要 |
A data communication circuit of a SDRAM for data communication comprises a plurality of data lines coupled to a plurality of data pins. The number of the data lines, according to an embodiment of the present invention, is less than the number of the data pins. When the data communication circuit receives/outputs data, one of the LDQM pin and the UDQM pin are enabled to receive/output a first part of the data. The other LDQM pin and the UDQM pin are enabled. Accordingly, the data communication circuit of the SDRAM, according to an embodiment of the present invention, is capable of transmitting more data using a bus with a narrow width.
|
