| 摘要 |
PROBLEM TO BE SOLVED: To reduce amount of plasma charged to semiconductor element and wire, even without making the dummy pattern area large. SOLUTION: A transistor 11 is formed on a semiconductor substrate 1, and an MNOS element 10 is formed on the semiconductor substrate 1. After charges are accumulated on the MNOS element 10, an interlayer insulating film 20 is formed. A first connecting hole 20b located on a gate electrode 5b, and a second connecting hole 20a located on the MNOS element 10, are formed to the interlayer insulating film 20. On the interlayer insulating film 20, a wire 22b is formed as connected to the gate electrode 5b via the first connecting hole 20b, and a dummy pattern 22a is formed as connected to the MNOS element 10 via the second connecting hole 20a. COPYRIGHT: (C)2006,JPO&NCIPI
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