| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device whose surge resistance is large in a semiconductor device configured such that the interior of the device is protected from surge current. <P>SOLUTION: In this DRAM, an n-type well region NW is formed on the front surface of a silicon substrate 20 such that the n-type well region NW is in vicinity to and in the periphery of an n+ type diffused resistor region 8 which is the resistive element of an internal protection circuit 9. An n+ type diffusion region 33 is formed on the front surface of the n-type well region NW. Ground potential GND is given to the n+ type diffusion region 33. Therefore, surge current leaked from the n+ type diffused resistor region 8 into the silicon substrate 20 can be absorbed in the n+ type diffusion region 33. Therefore, ability to absorb surge current is improved. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
