| 摘要 |
A phase detector and phase detection method for a sync pulse generator operable in a clock synchronizer that effectuates data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. At least one first flip flop is operable to sample the first clock signal with a rising edge of the second clock signal and at least one second flip flop is operable to sample the first clock signal with a falling edge of the second clock signal. The sampling produces transitions indicative of the coincident rising edges between the first and second signals.
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