| 摘要 |
A display driver having Dynamic Random Access Memory (DRAM) cells and a method of controlling the timing of the display driver are disclosed. The display driver includes memory cells each of which is implemented using a DRAM cell having a single transistor and a single capacitor. The display driver includes a drive control unit generating a scan signal, a refresh signal and a write/read signal, a word line drive unit driving word lines of the memory cells, and a data input/output unit for controlling input/output of data to/from the memory cells. The display driver gives priority to a write/read operation over a refresh operation and a scan operation.
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