Wordline boost circuit for DRAM

摘要

A boost voltage generator (14) generates a boost voltage (VPP) as a high-level voltage of word lines (WL). First word decoders (WDEC) output a low-level voltage or the high-level voltage according to a first address signal in an active period, and output the high-level voltage in a standby period. A switch circuit (26) connects a high-level voltage line for supplying the high-level voltage to the first word decoders (WDEC), with a boost voltage line in the active period, and connects the same with an internal voltage line in the standby period. The internal voltage line is supplied with a voltage lower than the boost voltage (VPP). Word drivers (WDRV) supply the boost voltage (VPP) to the word lines (WL) when the gates of their transistors receive the low-level voltage from the first word decoders (WDEC), and output the low-level voltage to the word lines (WL) when the gates thereof receive the high-level voltage from the first word decoders (WDEC).