发明名称 Advanced design format library for integrated circuit design synthesis and floorplanning tools
摘要 An integrated circuit design library includes a timing parameter representative of a design element in an integrated circuit; an area size parameter representative of the design element in an integrated circuit; and a routing demand parameter representative of a number of connections required for the design element for each value of the timing parameter and the area size parameter.
申请公布号 US6990651(B2) 申请公布日期 2006.01.24
申请号 US20030438530 申请日期 2003.05.14
申请人 LSI LOGIC CORPORATION 发明人 BALASUBRAMANIAN BALAMURUGAN;LAHNER JUERGEN;ADUSUMALLI SRINIVAS
分类号 G06F17/50 主分类号 G06F17/50
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