发明名称 Use of internal general purpose registers of a processor as a Java virtual machine top of stack and dynamic allocation of the registers according to stack status
摘要 An apparatus comprising a processor and a translator circuit. The processor may (i) comprise a number of internal registers and (ii) be configured to manipulate contents of the internal registers in response to instruction codes of a first instruction set. The translator circuit may be configured to implement a stack using one or more of the internal registers of the processor.
申请公布号 US6990567(B1) 申请公布日期 2006.01.24
申请号 US20000748029 申请日期 2000.12.22
申请人 LSI LOGIC CORPORATION 发明人 COHEN ARIEL;PERETS RONEN;ZEMLYAK BORIS
分类号 G06F15/00 主分类号 G06F15/00
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