发明名称 MOS transistor with a controlled threshold voltage
摘要 A MOS transistor with a controlled threshold voltage includes a SOI which includes a substrate composed of a semi-conducting material, a single crystal layer composed of a semi-conducting material and an insulating layer interposed between the substrate and the single crystal layer. The single crystal layer is formed therein with a source region, a drain region and a surrounded region surrounded by the source region and the drain region. The surrounded region includes a depletion layer having a composition surface which is in contact with the insulating layer. The MOS transistor comprises an EIB-MOS transistor of which the substrate is adapted to be applied with a voltage of a first polarity for inducing charges of a second polarity over the composition surface of the surrounded region.
申请公布号 US6989569(B1) 申请公布日期 2006.01.24
申请号 US19990389321 申请日期 1999.09.03
申请人 THE UNIVERSITY OF TOKYO 发明人 HIRAMOTO TOSHIRO;TAKAMIYA MAKOTO
分类号 H01L29/78;H01L29/786 主分类号 H01L29/78
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