发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit by which the load of a CPU (Central Processing Unit) is reduced by transiting a bus state. SOLUTION: The semiconductor integrated circuit 1 comprises: a bus state detection circuit 2; a bus state control circuit 3; and a bus driving circuit 4. The bus state control circuit 3 comprises: a register 5; and a control circuit 9. The bus B state detection circuit 2 detects the bus B state. The bus control circuit 9 waits until the bus B comes to an idle state when data and a start generation bit are set to the register 5, and outputs a first control signal, and outputs a second control signal when a stop generation bit is set to the register 5. The bus driving circuit 4 transits the bus B to a start state when the first control signal is supplied and successively outputs the data in the register 5, and transits the bus B to a stop state when the second control signal is supplied. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006018650(A) 申请公布日期 2006.01.19
申请号 JP20040196761 申请日期 2004.07.02
申请人 SEIKO EPSON CORP 发明人 MURAKAMI AKIO;HASU TATSUHIRO
分类号 G06F13/42;G06F13/38 主分类号 G06F13/42
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