System and method for verifying trace lengths and trace spaces in a circuit

摘要

The present invention provides a method for verifying trace lengths and trace spaces in a circuit. The method includes the steps of: retrieving information of a trace layout of the circuit; retrieving preset design rules on the trace lengths and the trace spaces of the trace layout; computing trace lengths and trace spaces of traces in the trace layout; verifying trace lengths and trace spaces in the trace layout by comparing the computed trace lengths and trace spaces of the traces with the preset design rules; and reporting results of the verifying step. A related system is also provided.