Video processor with programmable input/output stages to enhance system design configurability and improve channel routing

摘要

The video signals carried on a multitude of bus lines are selectively applied to multiple input formatters disposed in the input stage of a video signal processor. The input stage includes a multiplexing stage which receives the buses and selectively supplies one ore more of the buses for delivery to each of the input formatters disposed in the video signal processor. A second multiplexing stage also disposed in the input stage receives the bus lines delivered by the first multiplexing stage both in the original as well as in a changed order. Software controlled register bits coupled to the select terminals of the second multiplexing stage select between the original and the reordered bus lines and deliver the selected bus lines to the input formatters. The software controlled register bits are also applied to the select terminals of the multiplexers disposed in the first multiplexing stage.