发明名称 LOW DENSITY PARITY CHECK ENCODER/DECODER AND ENCODING/DECODING METHOD
摘要 PROBLEM TO BE SOLVED: To process bit update and parity update on pipeline. SOLUTION: An LDPC encoder/decoder comprises bit processing units 10-1 to 10-M (M=rm), parity processing units 20-1 to 20-m, and a controller 40. The units 10-1 to 10-M are provided in correspondence with first to M rows of a parity check matrix of such a structure as an m×m permutation matrix is arranged in r×s, and sequentially updates bit information where the value in that row corresponds to each column position of "1". Every time when bit update by the units 10-1 to 10-M ends for m column positions in the corresponding row of the check matrix, the units 20-1 to 20-m update parity information where the value in m columns to which the m column positions belong corresponds to each column position of "1". When parity update of first m columns of the check matrix by the units 20-1 to 20-m ends, the units 10-1 to 10-M start next bit update. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006019889(A) 申请公布日期 2006.01.19
申请号 JP20040193767 申请日期 2004.06.30
申请人 TOSHIBA CORP 发明人 YOSHIDA KENJI
分类号 H03M13/19;G06F11/10;H03M13/11;H04L1/00 主分类号 H03M13/19
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