发明名称 |
INTERRUPTION CONTROL DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To ensure guarantee for performing fixed-cycle processing by an expected procedure at a fixed cycle as to an interruption control device for a CPU (central processing unit). SOLUTION: The interruption control device comprises: an interruption receiving means 11 for receiving an interruption from a peripheral circuit; a number-of-interruption processing cycles setting means 12 for setting the number of interruption processing cycles to be executed by a CPU 100 in each interruption from the peripheral circuit; a monitoring means 13 for monitoring CPU processing to be periodically executed by the CPU 100; an interruption control means 14 for controlling an interruption generated at the timing of collision with processing to be periodically executed by the CPU; and an interruption output means for outputting the interruption to the CPU 100. Consequently an interruption generated at the timing of collision with fixed-cycle processing in the CPU 100 can be inhibited and guarantee for executing the fixed-cycle processing in the CPU 100 by the expected procedure at the fixed cycle can be ensured. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2006018559(A) |
申请公布日期 |
2006.01.19 |
申请号 |
JP20040195319 |
申请日期 |
2004.07.01 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
ETANI KOJI;SHIMAMURA AKIMITSU |
分类号 |
G06F9/48;G06F13/24 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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