| 摘要 |
Embodiments of the present invention relate to a signal processing circuit and, more particularly, to an arithmetic circuit for performing arithmetic operations such as, for example, multiplication and/or addition/subtraction operations, as well as to a circuit having a voltage-controlled transconductance. The circuit comprises a first MOSFET arrangement for performing an arithmetic operation for given first operands and, preferably, at least one other MOSFET for performing substantially the same arithmetic operation for given second operands with the second operands being chosen to the influence the output of the first MOSFET circuit by at least reducing, and preferably, eliminating, the presence of an undesirable component of the output of the first MOSFET circuit. |
