发明名称 PHASE LOCKED LOOP WITH NONLINEAR PHASE-ERROR RESPONSE CHARACTERISTIC
摘要 A phase-locked loop includes a phase/frequency detector for generating phase error signal according to a reference signal and an input signal, a charge pump for outputting a voltage signal according to the phase error signal, a voltage-controlled oscillator for outputting an output signal corresponding to the phase error signal according to the voltage signal, an adaptive adjusting unit for outputting a control signal according to the phase error signal, so as to form a nonlinear between the output signal and the phase error signal.
申请公布号 US2006012438(A1) 申请公布日期 2006.01.19
申请号 US20050160767 申请日期 2005.07.07
申请人 CHOU YU-PIN;CHIANG CHIA-LIANG 发明人 CHOU YU-PIN;CHIANG CHIA-LIANG
分类号 H03L7/00;H03L7/06;H03L7/089;H03L7/093 主分类号 H03L7/00
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