发明名称 Serial data transfer method in synchronism with a clock signal
摘要 <p>A serial data transfer method utilizing one clock line and one serial data line. The method transfers a sequence of serial data bits on the serial data line, with each bit synchronized with a rise of a clock signal on the clock line. A chip enablement signal is placed within a particular data bit in synchronism with a particular fall of the clock signal associated with the particular data bit to determine the range of the serial data based on the bit position of the chip enablement signal. A further data identification flag bit is placed in the data bit that follows the chip enablement signal to indicate whether the serial data constitute a command code or write data. Thus, the data transfer method of the invention provides a simple and efficient serial data transfer method by minimizing control bits in accordance with the invention, using only two signal lines as in IIC data transfer methods. </p>
申请公布号 EP1096745(A3) 申请公布日期 2006.01.18
申请号 EP20000123348 申请日期 2000.10.27
申请人 ROHM CO., LTD. 发明人 TANAKA, TOSHIMASA
分类号 G06F13/38;H04L25/02;G06F13/42;H04L7/00;H04L7/027;H04L25/40;H04L29/08 主分类号 G06F13/38
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