发明名称 INTEGRATED CIRCUIT DIE I/O CELLS
摘要 An integrated circuit die (103) includes an input/output (I/O) cell (203). The I/O cell includes active I/O circuitry (211) in a substrate, a plurality of metal interconnect layers (316, 314), an insulating layer, a first pad (206), and a second pad (208). The plurality of metal interconnect layers are formed over the substrate. The insulating layer is formed over the plurality of metal interconnect layers. The second pad (208) is formed over the insulating layer and positioned directly over at least two metal structures (213, 215) in a final metal layer of the plurality of interconnect layers. The pad is selectively coupled to one of at least two metal structures by at least one opening (211) in the insulating layer (303).
申请公布号 KR20060004930(A) 申请公布日期 2006.01.16
申请号 KR20057019121 申请日期 2004.04.08
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 DOWNEY HAROLD A.;DOWNEY SUSAN H.;MILLER JAMES W.
分类号 H01L23/48;H01L21/60;H01L23/50;H01L23/528 主分类号 H01L23/48
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