发明名称 Methods of forming buried bit line DRAM circuitry
摘要 A method of forming buried bit line DRAM circuitry includes collectively forming a buried bit line forming trench, bit line vias extending from the bit line forming trench, and memory array storage node vias within a dielectric mass using only two masking steps. Conductive material is simultaneously deposited to within the buried bit line forming trench, the bit line vias, and the memory storage node vias within the dielectric mass. Other aspects and implementations are contemplated.
申请公布号 US2006008979(A1) 申请公布日期 2006.01.12
申请号 US20050217539 申请日期 2005.09.01
申请人 发明人 LIAO ANN K.;WESTPHAL MICHAEL J.
分类号 H01L21/8242;H01L21/60 主分类号 H01L21/8242
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