CASCADE WAKE-UP CIRCUIT PREVENTING POWER NOISE IN MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a cascade wake-up circuit which prevents power noise in a memory device.

SOLUTION: The wake-up circuit employs a cascade chain structure in which bit lines are divided into a plurality of blocks and a wake-up operation is advanced to a next block by feeding back a bit line voltage of a preceding block after the completion of a wake-up operation of the preceding block out of a plurality of separated blocks. Thus the variance of a wake-up delay can be detected to control peak currents, and power noise can be considerably reduced.

COPYRIGHT: (C)2006,JPO&NCIPI