发明名称 MULTILAYER WIRING STRUCTURE AND METHOD OF FORMING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring structure including connection wiring with which predetermined two points belonging to different wiring layers among the multilayer wiring of a semiconductor device are connected in a reduced distance, in consideration of the fact that the connection wiring connecting the connection point of an upper layer 1 wiring to the connection point of a lower wiring 2 is not the shortest route, because a wiring lattice and a vertical connection hole have limitation in a conventional multilayer wiring structure, and to provide a method of forming the connection wiring in the multilayer wiring structure. SOLUTION: The multilayer wiring structure is provided with a first wiring, a second wiring belonging to the wiring layer different from the wiring layer to which the first wiring belongs, and a third wiring for connecting the first wiring to the second wiring. In the multilayer structure, the third wiring belongs to a different wiring layer and includes a wiring along a stereoscopic diagonal line connecting the two points positioned on different plane. Also, in a method of manufacturing a multilayer wiring structure, a process of forming the third wiring includes a process of forming a through hole along the stereoscopic diagonal line, and a process of filling a conductive material into the through hole. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006013078(A) 申请公布日期 2006.01.12
申请号 JP20040187005 申请日期 2004.06.24
申请人 FUJITSU LTD 发明人 KATASE HIDEJI;SUZUKI KOICHI;CHICHII KENJI;TAWARA KATSUJI
分类号 H01L23/522;H01L21/28;H01L21/285;H01L21/302;H01L21/44;H01L21/768;H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/522
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