| 摘要 |
A LTPS-TFT structure comprising a cap layer, a polysilicon film and a gate is provided. The cap layer is disposed over the substrate with a gap between the two. The polysilicon film is disposed over the cap layer and is divided into a channel region and a source/drain region on each side of the channel region. The channel region is located above the gap. The gate is disposed above the channel region. Because the gap lies underneath the channel region, the thermal conductivity in the channel region is lower during the laser annealing process. Therefore, the silicon atoms can have a longer re-crystallization time so that larger grains are formed within the channel region and grain boundary therein is reduced. Furthermore, the grain orientation of the polysilicon film is mostly parallel to the transmission direction of electron within the transistor so that the operation efficiency of the transistor is improved.
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