| 摘要 |
Drain extended MOS transistors ( 52 ) and fabrication methods ( 100 ) therefor are presented, in which a voltage drop region ( 80 ) is provided in a well ( 82 ) of a second conductivity type between a channel ( 78 ) of a first conductivity type and a drain ( 74 ) to inhibit channel hot carrier or direct tunneling degradation of the transistor gate dielectric ( 64 ) for high voltage operation. The voltage drop region ( 80 ) has more dopants of the first conductivity type and/or fewer dopants of the second conductivity type than does the well ( 82 ) so as to shift the high fields away from the transistor gate dielectric ( 64 ).
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