发明名称 MANUFACTURING METHOD OF MULTILAYER CIRCUIT BOARD
摘要 PROBLEM TO BE SOLVED: To provide the manufacturing method of a multilayer circuit board, wherein its dimensional accuracy is improved by suppressing its contraction in the surface-direction, and by suppressing the generations of its deformation and its delamination. SOLUTION: The manufacturing method has a first process of so laminating first insulating layers 1a, 1b, second insulating layers 1c, 1d, 1e whose contraction-initiating temperature is higher than the one for the first insulating layers; and third insulation layers 1f, 1g whose contraction initiating temperature is higher than the one of the second insulation layers as to interpose the second insulating layer between the first and third insulating layers; a second process for so heating a laminate 1 obtained in the first process at a temperature which is lower than the contraction-initiating temperature of the second insulation layers, and is not lower than the contraction-initiating temperature of the first insulating layers as to contract the first insulation layers in the thickness-direction of them largely in comparison with the surface-direction of them; a third process of so heating the laminate 1 at a temperature which is lower than the contraction-initiating temperature of the third insulating layers, and is not lower than the contraction-initiating temperature of the second insulating layers as to contract the second insulating layers in their thickness-direction large, in comparison with their surface-direction; and a fourth process of so heating the laminate 1 at a temperature which is not lower than the contraction-initiating temperature of the third insulating layers as to contract the third insulating layers in the thickness-direction of them by a large amount and as to complete the sintering of the laminate 1. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006013354(A) 申请公布日期 2006.01.12
申请号 JP20040191729 申请日期 2004.06.29
申请人 KYOCERA CORP 发明人 NAKANO NORIO
分类号 H05K3/46 主分类号 H05K3/46
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