发明名称 |
METHOD FOR OPERATING ARRAY OF DUAL-PORT MEMORY CELL AND INTEGRATED CIRCUIT MEMORY |
摘要 |
PROBLEM TO BE SOLVED: To provide a dual port memory which eliminates substantially noise problems associated with the staggered methods of operation. SOLUTION: First and second word lines of the dual port memory are simultaneously activated so that all four bit lines associated with the cell also move at the same time. The dual port memory uses a simple control logic circuit without the need for additional external control signals. There are no lock-out time nor write restriction by the method of the present invention. The dual-port memory includes a method for hiding refresh and a method for increasing operating speed. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2006012375(A) |
申请公布日期 |
2006.01.12 |
申请号 |
JP20040317432 |
申请日期 |
2004.11.01 |
申请人 |
UNITED MEMORIES INC;SONY CORP |
发明人 |
PARRIS MICHAEL C;BUTLER DOUGLAS B |
分类号 |
G11C11/406;G06F12/00;G11C8/16;G11C11/401;G11C11/405 |
主分类号 |
G11C11/406 |
代理机构 |
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代理人 |
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地址 |
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