发明名称 Testing system for semiconductor memory device
摘要 A testing architecture for a semiconductor memory device is described. The testing architecture comprises a microprocessor, as well as a result sorting and display device. When a start signal is received by the microprocessor, a clock signal is output from the microprocessor to the semiconductor memory device so that a data storing signal is output from the memory device to the microprocessor. When the data storing signal is received by the microprocessor, the data storing signal is tested and compared, and a testing result signal is output. The resorting and display device is used to output the start signal to the microprocessor, receive the result signal, and sort the result signal so as to display whether data stored by the semiconductor memory device is correct.
申请公布号 US6986082(B2) 申请公布日期 2006.01.10
申请号 US20010895559 申请日期 2001.06.28
申请人 WINBOND ELECTRONICS CORP. 发明人 HSIAO KUN-TI;LO HAO-LIANG;YANG LI-YANG
分类号 G11C29/00;G01R31/26;G11C29/48;G11C29/56 主分类号 G11C29/00
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