| 摘要 |
The invention relates to a method for the production of an integrated circuit, comprising the following steps: a substrate ( 1 ) is provided with at least one first, second and third gate stack (GS 1 , GS 2 , GS 3 ) of approximately the same height surface of said substrate, a common active area ( 60 ) being provided on the surface of the substrate in said substrate ( 1 ) between the first and second gate stack (GS 1 , GS 2 ); a first insulating layer ( 70 ) is provided in order to cover the embedding of the first second and third gate stack (GS 1 , GS 2 , GS 3 ); the upper side of a gate connection ( 20 ) of the third gate stack (GS 3 ) is uncovered; a second insulating layer ( 80 ) is provided in order to cover the upper side of a gate connection ( 20 ); a mask (M 2 ) is provided on the resulting structure having a first opening ( 12 a) above the uncovered upper side of the gate connection ( 20 ) of the third gate stack (GS 3 ), a second opening (F 2 b) above the substrate ( 1 ) between the third and second gate stack (GS 3 , GS 2 ) and a third opening (F 2 c) above the common active area ( 60 ), partially overlapping the first and second gate stack (GS 1 , GS 2 ), and simultaneously forming a first, second and third contact hole (KB, KS, KG) using said mask ( 32 ) in an etching process, the first contact hole (KB) uncovering the common active area ( 60 ) on the surface of the substrate between the first and second gate stack (GS 1 , GS 2 ), the second contact hole (KS) uncovering the surface of the substrate between the second and third gate stack (GS 2 , GS 2 ) and the third contact hole (KG) uncovering the upper side of the gate connection ( 20 ) of the third gate stack (GS 3 ).
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