发明名称 Wire-speed packet management in a multi-pipeline network processor
摘要 A flow-identification content addressable memory (FICAM) comprising a row of content addressable memory (CAM) cells operable to store a first flow-identification. The first flow-identification corresponds to a first packet dispatched for processing by a pipeline unit (PU) belonging to a network processor. A comparison unit compares a second flow-identification corresponding to a second packet with contents of said at least a row of CAM cells. The comparison unit is further capable of determining if the second flow-identification is same as the first flow-identification. A flow identification eraser is provided for removing the first flow-identification from said at least a row of CAM cells upon determination by the comparison unit that the second flow-identification is same as the first flow-identification.
申请公布号 US2006002392(A1) 申请公布日期 2006.01.05
申请号 US20040882305 申请日期 2004.07.02
申请人 P-CUBE LTD. 发明人 MALEREVICH OREN
分类号 H04L12/28 主分类号 H04L12/28
代理机构 代理人
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