发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To secure operation of output registers (flip-flops) connected to an output buffer of a semiconductor integrated circuit. <P>SOLUTION: The semiconductor integrated circuit 100 is provided with: an output clock generating circuit 2 for generating n-times clocks by a PLL circuit 21 to which a reference clock is inputted, generating a plurality of delay clocks gradually delayed by 1/n-times of the cycle of a reference clock on the basis of the n-times clocks, alternatively selecting a delay clock for driving a group 6 of output registers from among the plurality of generated delay clocks, and outputting the delay clock to the group 6 of output registers; a function circuit 3 for executing a specific function in synchronization with the reference clock; and a test circuit 5 for testing the operating state of the group 6 of output registers by comparing and collating data outputted from the function circuit 3 and inputted to the group 6 of output registers with data outputted from the group 6 of output registers. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006003152(A) 申请公布日期 2006.01.05
申请号 JP20040178206 申请日期 2004.06.16
申请人 KONICA MINOLTA BUSINESS TECHNOLOGIES INC 发明人 ABE MASAKAZU
分类号 G01R31/28;G06F1/04 主分类号 G01R31/28
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