| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To realize an input buffer circuit having a sufficient operation margin with respect to a threshold voltage fluctuation of a transistor constituting the circuit. <P>SOLUTION: An input buffer circuit 11 has a differential amplifier circuit 2 comprised of the Pch MOS transistor P 1 and a differential amplifier section 4, a NOR circuit 3 and a reference voltage generation section 5. The Pch MOS transistor P 1 is connected at its source to a high potential side power source Vcc and at its drain to the differential amplifier section 4. A chip enable signal CN is inputted to the gate and the transistor turns on when the potential of the chip enable signal CN is "Low". The differential amplifier section 4 outputs the signal comparing and amplifying the potential of an input signal IN and a reference potential Vref when the Pch MOS transistor P 1 turns on by the input of the input signal IN and the reference potential Vref. The chip enable signal CN and the signal outputted from the differential amplifier circuit 2 are inputted to the NORcircuit3 to performs logic operation and output an output signal OUT. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
