| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device permitting the entry with no wait, when the entry into a data holding operational mode of a super low power consumption is performed again. SOLUTION: In the semiconductor storage device in which an ECC circuit is mounted on-chip, the data holding operational mode shifts to an idle state IST, when receiving an instruction for the exit from the data holding operational mode, in an encoded state EEST in which an ECC encoding circuit adds parity information to the data of memory cells and stores them, a burst self refresh state BSST in which a concentrated refresh operation of the memory cells is performed, a power off state PFST in which an internal power supply circuit is partially turned off, a power on state PNST in which the internal power supply circuit that is partially turned off is turned on, the decoding state EDST in which a decoding circuit for the error detection/correction corrects the error of the memory cell, and the encoded state, in the order of the state transition. The reentry from the decoded state EDST to the BSST can be permitted. COPYRIGHT: (C)2006,JPO&NCIPI
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