| 摘要 |
PROBLEM TO BE SOLVED: To attain high speed access without using complicated control circuits in an information processor having an external memory means which is accessed by sectors. SOLUTION: An SRAM 103 having the same capacity as a unit sector of the external memory section 104 is arranged in a secondary cache of a CPU 101. When request data of the CPU 101 are stored in the SRAM 103, data are directly sent to the CPU 101 from the SRAM 103, and when it is not stored, read access to the external memory section 104 is carried out and the SRAM 103 is overwritten/updated and the request data is sent to the CPU 101. Data of high frequency of use are stored in SRAM 103 by above operation, and access frequency to the external memory section 104 is reduced and the high speed access is realized. COPYRIGHT: (C)2006,JPO&NCIPI
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