发明名称 Error insertion circuit for SONET forward error correction
摘要 An OC-192 front-end application-specific integrated circuit (ASIC) de-interleaves an OC-192 signal to create four OC-48 signals, and decodes error-correction codes embedded in each of the four OC-48 signals. An error insertion circuit is also provided for verifying correct operation of encoding and decoding circuits. A desired number of errors may be programmed for insertion into the OC-48 data signals. Error insertion may be performed in an iterative fashion to insert into different data signals the desired number of errors, wherein the errors are placed within the code words of the data signals at different location permutations for each data signal. In one implementation, error verification is performed using an error accumulator located in the receiver, and means are provided for examining an error accumulator count of the error accumulator to see if the number of accumulated errors matches with the number of inserted errors.
申请公布号 US6983414(B1) 申请公布日期 2006.01.03
申请号 US20010821948 申请日期 2001.03.30
申请人 CISCO TECHNOLOGY, INC. 发明人 DUSCHATKO DOUGLAS E.;THURSTON ANDREW J.
分类号 H03M13/00 主分类号 H03M13/00
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