摘要 |
Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C<SUP>3</SUP>MOS) logic fabricated in conventional CMOS process technology. An entire family of logic elements including inverter/buffers, level shifters, NAND, NOR, XOR gates, latches, flip-flops and the like are implemented using C<SUP>3</SUP>MOS techniques. Optimum balance between power consumption and speed for each circuit application is achieve by combining high speed C<SUP>3</SUP>MOS logic with low power conventional CMOS logic. The combined C<SUP>3</SUP>MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems. The C<SUP>3</SUP>MOS structure enables the use of a power supply voltage that may be larger than the voltage required by the CMOS fabrication process, further enhancing the performance of the circuit.
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