发明名称 Test pattern generating method, test pattern generating apparatus and storing medium stored with test pattern generating program being readable by computer
摘要 The present invention is a test pattern generating method. And the test pattern generating method provides a counting step for counting the number of faults becoming undetectable respectively, at each of states 0 and 1 that are able to be given to each of input pins of EOR gates when each of the EOR gates becomes a D frontier (different frontier) or a J frontier (justify frontier), a selecting step for selecting a state in which the number of faults becoming undetectable is smaller in the 0 and 1 states as an allocating state to the input pin, based on a counted result at the counting step, and step for generating the test pattern based on a selected state at the selecting step. With this, dynamic compaction can be effectively executed by restraining the increase of the number of test patterns.
申请公布号 US2005289425(A1) 申请公布日期 2005.12.29
申请号 US20040965766 申请日期 2004.10.18
申请人 FUJITSU LIMITED 发明人 MARUYAMA DAISUKE
分类号 G01R31/28;G01R31/3181;G01R31/3183;G06F11/00;(IPC1-7):G06F11/00 主分类号 G01R31/28
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