发明名称 PLL CIRCUIT AND PHASE CONTROL METHOD OF PLL CIRCUIT
摘要 A PLL circuit having a phase build-out function and a phase control method of the PLL circuit, in which a phase build-out detector monitors the input phase of a PLL device and detects a transient wander component and a cycle wander component at the same time. When only the transient wander component is automatically detected, a phase build-out actuator resets a phase detector, a digital amp-1 and a digital filter to restructure an output phase as before an input phase change. As to the cycle wander component detected at the same time, no phase restructuring is carried out.
申请公布号 CA2510738(A1) 申请公布日期 2005.12.28
申请号 CA20052510738 申请日期 2005.06.27
申请人 NEC CORPORATION 发明人 TAKAHASHI, MASAYUKI
分类号 G01R25/00;G01R25/04;H03L7/085;H03L7/093;(IPC1-7):H03L7/097 主分类号 G01R25/00
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