| 摘要 |
A display driver circuit holds a gray-scale value in a gray-scale value latch circuit corresponding to a shift output signal from a shift register, and drives first to Mth (M is an integer of two or more) signal electrodes. The gray-scale value latch circuit includes first to Mth gray-scale value latches. First to kth (1<=k<M, k is an integer) gray-scale value latches among the first to Mth gray-scale value latches take in the gray-scale value on a left gray-scale value signal bus based on the shift output signal. (k+1)th to Mth gray-scale value latches among the first to Mth gray-scale value latches take in the gray-scale value on a right gray-scale value signal bus based on the shift output signal. A bus dividing circuit outputs the gray-scale value on a gray-scale value bus to either or both of the left and right gray-scale value signal buses based on a bus dividing signal.
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