发明名称 Technique to control tunneling currents in DRAM capacitors, cells, and devices
摘要 Structures and methods are provided for the use with PMOS devices. Materials with large electron affinities or work functions are provided for structures such as gates. A memory cell is provided that utilizes materials with work functions larger than n-type doped polysilicon (4.1 eV) or aluminum metal (4.1 eV) for gates or capacitor plates.
申请公布号 US6979607(B2) 申请公布日期 2005.12.27
申请号 US20030721585 申请日期 2003.11.25
申请人 发明人
分类号 G11C11/401;H01L21/8242;H01L27/108;(IPC1-7):H01L21/823 主分类号 G11C11/401
代理机构 代理人
主权项
地址