摘要 |
PROBLEM TO BE SOLVED: To suppress current caused to flow to a node of voltage VBB when a word line is active. SOLUTION: When access is started, a signal RST_n releases a reset state, and when an address signal Xc is inputted, a node A makes a transition from VPP to the level of VSS and a node B becomes at the level of VPP. Since a timing signal ASD is not activated even though a block selection signal RBS is activated, a node C is at the level of VDD and a WL is connected to ground through NTRs (n channel type transistor) 11 and 12. That is, the WL makes a transition from VPP to the level of VSS. After that, when the timing signal ASD is activated and the node C is transited to the level of VSS, an NTR 7 is turned on, the NTR 11 is turned off and the WL is disconnected from ground potential. Since an NTR 9 is turned on, the WL is at the level of VBB. Current caused to flow to a node of VBB is reduced to current corresponding to an electric difference between VSS and VBB. COPYRIGHT: (C)2006,JPO&NCIPI
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