发明名称 NONVOLATILE SEMICONDUCTOR MEMORY AND ITS WRITING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent sequence disturbance which occurs dependent upon a path where biases in a standby state and a write state shift and in which a different memory cell on one and the same wordline is erroneously written or erased in a nonvolatile semiconductor memory device that uses a charge storage film. <P>SOLUTION: In a procedure, a diffusion layer voltage Vs on a memory transistor side is changed and the gate voltage Vmg of the memory transistor is changed after the Vs exceeds the specified value Vsx of an intermediate stage regarding the rise and fall of a wordline bias. Alternatively, in a procedure, the gate voltage Vmg of the memory transistor is changed and the diffusion layer voltage Vs on the memory transistor side is changed after the Vmg exceeds the specified value Vmgx of an intermediate stage. The values Vsx and Vmgx are determined on the basis of the level of a gate insulating film electric field that does not cause FN electron injection which brings about a change in threshold voltage and the level of a potential barrier to a hole where a BTBT hot-hole injection does not occur. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005353159(A) 申请公布日期 2005.12.22
申请号 JP20040172078 申请日期 2004.06.10
申请人 RENESAS TECHNOLOGY CORP 发明人 YASUI KAN;HISAMOTO MASARU;TANAKA TOSHIHIRO;YAMAKI TAKASHI
分类号 G11C16/02;G11C16/04;G11C16/34;H01L21/8247;H01L27/10;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/02
代理机构 代理人
主权项
地址